Today, thanks to the development of production processes, more transistors can be fitted in the smaller membrane area, but the need for space and performance in the electronics world is growing faster and there are difficulties in meeting this. Chip designers started to try multiple chip solutions to increase the number of transistors, keeping costs at a level. Multiple chip solutions are increasing especially on the processor side.
Stratix, a programmable chip designer recently incorporated by Intel, has achieved significant success. The division succeeded in combining two FPGA chips on a single membrane, revealing the world’s largest FPGA chip.
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The Stratix 10 GX 10M chip combines two FPGA chips with 3 EMIB bridges. As you can remember, the EMIB connection was introduced for the first time on Intel processors with AMD graphics. Intel did not develop another EMIB-powered processor, but shifted technologies to a different area.
With a total of 25920 ports on 3 EMIB bridges, a bandwidth of up to 6.5Tb / s can be created between the two membranes. The huge membrane with 14nm manufacturing process has 43.3 billion transistors. The chip also has 10.2 million logic cells. On the four sides of the chip, there are a total of 48 transceivers with mini chips for customization purposes. These are able to capture 4.5Tb / s connection speeds with EMIB bridges.
With the 2304 user I / O pins, the Stratix 10 GX 10M chip, which allows developers to produce different integration solutions, also offers 40 percent better energy efficiency than other models in the series.
The Stratix 10 GX 10M chip has been named the “largest FPGA chip inden by Xilinx’s Virtex VU19P FPGA chip with 35 billion transistors. The integrated Stratix 10 GX 10M, designed for ASIC and emulator projects, is now being sampled to customers.